Glossary

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ASM (Super NES Programming/65c816 reference) [1]

Internal Registers

Register Description
A The accumulator. This is the math register. It stores one of two operands or the result of most arithmetic and logical operations.
X, Y The index registers. These can be used to reference memory, to pass data to memory, or as counters for loops.
S The stack pointer, points to the next available(unused) location on the stack.
DBR Data bank register, holds the default bank for memory transfers.
D Direct page register, used for direct page addressing modes.
PBR Program Bank, holds the bank address of all instruction fetches.
P Processor Status, holds various important flags, see below.

Flags stored in P register

Mnemonic Name Value Binary Value
N [N]egative #$80 10000000
V O[v]erflow #$40 01000000
- - #$20 00100000
B [B]reak #$10 00010000
D [D]ecimal #$08 00001000
I [I]nterrupt #$04 00000100
Z [Z]ero #$02 00000010
C [C]arry #$01 00000001
Mnemonic Value Binary Value Description
M #$20 00100000 Accumulator register size (native mode only) (0 = 16-bit, 1 = 8-bit)
X #$10 00010000 Index register size (native mode only) (0 = 16-bit, 1 = 8-bit)
E not in P 6502 emulation mode

Branch Instructions

Instruction Description Flags Notes
BRA Branch Always - unconditional
BRL Branch Always Long - unconditional
BPL Branch if plus < 80h N N=0
BMI Branch if minus >= 80h N N=1
BVC Branch if overflow flag is clear V V=0
BVS Branch if overflow flag is set V V=1
BNE Branch if Not Equal to zero Z Z=0
BEQ Branch if Equal to zero Z Z=1
BCC Branch if Carry Flag is Clear C C=0
BCS Branch if Carry Flag is Set C C=1

Arithmetic and Logical Instructions

Instruction Description Flags set Arguments
ADC Add A with something and carry bit. Result is put in A. n,v,z,c Immediate value or address
SBC Subtract something and the carry bit. n,v,z,c
AND Logical AND A with memory, storing result in A. n, z Immediate value or address
EOR Exclusive OR n, z
ORA Logical OR A with memory, storing result in A. n, z Immediate value or address
TSB Test and set bits z
TRB Test and reset bits z
ASL Arithmetic shift left n, z,c A or address
LSR Logical shift right n, z,c A or address
ROL Rotate left n, z,c A or address
ROR Rotate right n, z,c A or address
BIT test bits, setting n,v,z (only z if in immediate mode) immediate value or address
CMP Compare accumulator with memory n, z,c
CPX Compare register X with memory n, z,c
CPY Compare register Y with memory n, z,c
DEA Decrement Accumulator n, z
DEC Decrement, see INC n, z
DEX Decrement X register n, z
DEY Decrement Y register n, z
INA Increment Accumulator n, z
INC Increment, see DEC n, z
INX Increment X register n, z
INY Increment Y register n, z
XBA Exchange bytes of accumulator n, z
NOP No operation none

Load/Store Instructions

Instruction Description
LDA Load accumulator from memory
LDX Load register X from memory
LDY Load register Y from memory
STA Store accumulator in memory
STX Store register X in memory
STY Store register Y in memory
STZ Store zero in memory

Transfer Instructions

Instruction Description Flags
TAX Transfer Accumulator to index register X n,z
TAY Transfer Accumulator to index register Y n,z
TCD Transfer 16-bit Accumulator to Direct Page register n,z
TCS Transfer 16-bit Accumulator to Stack Pointer none
TDC Transfer Direct Page register to 16-bit Accumulator n,z
TSC Transfer Stack Pointer to 16-bit Accumulator n,z
TSX Transfer Stack Pointer to index register X n,z
TXA Transfer index register X to Accumulator n,z
TYA Transfer index register Y to Accumulator n,z
TXS Transfer index register X to Stack Pointer none
TYX Transfer index register Y to index register X n,z
TXY Transfer index register X to index register Y n,z

Jump and call instructions

Instruction Description
JMP Jump
JML Jump long
JSR Jump and save return address
JSL Jump long and save return address
RTS Return from short subroutine
RTL Return from long subroutine

Interrupt instructions

Instruction Description
BRK Break point instruction (generates software interrupt)
COP Generate coprocessor interrupt
RTI Return from interrupt
STP Stop processor until RESET
WAI Wait for hardware interrupt

P Flag instructions

Instruction Description Notes
CLC Clear carry flag
CLD Clear the decimal flag Selects binary arithmetic
CLI Clear the interrupt flag Enables interrupt requests
CLV Clear overflow flag
REP Reset status bits (for example REP 0x00100000 clears the M flag)
SEC Set carry flag
SED Select decimal arithmetic
SEP Set status bits (for example SEP 0x00010000 sets the X flag)
SEI set interrupt flag Disables interrupt requests
XCE Exchange carry flag with emulation flag

Stack Instructions

Instruction Description
PHA Push Accumulator
PHX Push index register X
PHY Push index register Y
PHD Push direct page register
PHB Push data bank register
PHK Push Program Bank Register
PHP Push processor status
PEA Push effective address
PEI Push effective indirect address
PER Push effective relative address
PLA Pop Accumulator
PLX Pop index register X
PLY Pop index register Y
PLP Pop processor status
PLD Pop direct page register
PLB Pop data bank register

Technicalities

Acronym Meaning Description
DMA Direct Memory Access basically a piece of hardware that allows I/O devices to copy to and from main memory independently of CPU control
HDMA H-Blank Direct Memory Access
NMI [2] non-maskable interrupt
IRQ Interrupt Request