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ff3:ff3us:doc:snes:opcode [2016/03/06 19:11] hatzen08 created |
ff3:ff3us:doc:snes:opcode [2022/09/21 18:38] (current) strotlog undo incorrect changes to c flag: c=1 carries in a 1 in adds; c=1 is set by overflowing |
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The STZ opcode will always store the value of zero in the designed memory address. Unlike the STA, STX and STY opcodes, the STZ opcode doesn' | The STZ opcode will always store the value of zero in the designed memory address. Unlike the STA, STX and STY opcodes, the STZ opcode doesn' | ||
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- | ^ Opcode | + | ^ Opcode |
- | | 86 |STX dp | + | | 86 |STX dp |
- | | 8E |STX addr | + | | 8E |STX addr |
- | | 96 |STX dp,Y | + | | 96 |STX dp,Y |
- | ^ Opcode | + | ^ Opcode |
- | | 84 |STY dp | + | | 84 |STY dp |
- | | 8C |STY addr | + | | 8C |STY addr |
- | | 94 |STY dp,X | + | | 94 |STY dp,X |
- | ^ Opcode | + | ^ Opcode |
- | | 64 |STZ dp | + | | 64 |STZ dp |
- | | 74 |STZ dp,X | + | | 74 |STZ dp,X |
- | | 9C |STZ addr | + | | 9C |STZ addr |
- | | 9E |STZ addr, | + | | 9E |STZ addr, |
===== TRB, TSB ===== | ===== TRB, TSB ===== | ||
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Test all bits in the A or C register. For all bits set in the A or C register, the correspondent bits will be set or unset in the designed memory address. TSB will set the correspondent bits and TRB will reset the correspondent bits. All clear bits in the A or C register will be ignored and their correspondent bits in the designed address will not be altered. | Test all bits in the A or C register. For all bits set in the A or C register, the correspondent bits will be set or unset in the designed memory address. TSB will set the correspondent bits and TRB will reset the correspondent bits. All clear bits in the A or C register will be ignored and their correspondent bits in the designed address will not be altered. | ||
- | ^ Opcode | + | ^ Opcode |
- | | 14 |TRB dp | + | | 14 |TRB dp |
- | | 1C |TRB addr | + | | 1C |TRB addr |
- | ^ Opcode | + | ^ Opcode |
- | | 04 |TSB dp | + | | 04 |TSB dp |
- | | 0C |TSB addr | + | | 0C |TSB addr |
===== ADC, SBC ===== | ===== ADC, SBC ===== | ||
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===== BIT ===== | ===== BIT ===== | ||
- | Does a binary AND between the A or C register and the memory. Unlike the AND opcode, the binary AND operation | + | Does a binary AND between the A or C register and the memory. Unlike the AND opcode, the binary AND operation |
^flags | ^flags | ||
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^ Opcode | ^ Opcode |